Memory chips, ushering in a "golden age"
Recently, Morgan Stanley's research report pointed out that under the drive of AI, the imbalance between supply and demand in the storage industry has intensified. It is expected that a "super cycle" lasting for several years will begin. By 2027, the global storage market size is expected to approach 300 billion US dollars, and the storage chip industry may be approaching the starting point of a new round of industrial cycle.
Memory chips, initiating a super cycle
The cyclical nature of memory chips is significantly stronger than that of other semiconductor sub-sectors. Over the past 13 years, it has shown a cycle pattern of 3 to 4 years. Currently, it is in the fourth round of the cycle.
Looking back at the first three rounds: from 2012 to 2015, it was driven by the wave of smart phone replacements, but later declined due to oversupply caused by expansion. From 2016 to 2019, benefiting from the transfer of 3D NAND production capacity, the iteration of DDR4 and the demand for mobile games, the prices of DRAM and other products rose by more than 100%.
Subsequently, they were adjusted due to the weak demand for PCS and servers. From 2020 to 2023, the pandemic gave rise to the demand for remote working and data centers. Storage prices initially rose but then dropped by more than 50% due to weak demand and overcapa
city. Since 2024, AI computing power infrastructure and the HBM technological revolution have become new engines, rewriting the traditional cycle logic.
In the fourth cycle, storage demand no longer relies on the personal consumer end. Enterprise-level AI capital expenditure has become an important support, driving large-scale growth in markets such as HBM, DDR4/DDR5, and enterprise-level SSDS. Under this trend, industry leaders such as Samsung and SK Hynix have launched a new round of competition, and their performance has seen an unprecedented high growth. On October 14th, Samsung's preliminary financial report showed that its operating profit in Q3 was 12.1 trillion won, a year-on-year increase of 31.81% and a quarter-on-quarter increase of 158.55%, far exceeding expectations. Samsung's operating profit for a single quarter has risen above 10 trillion won after five quarters, setting a new record since the second quarter of 2022 (14.1 trillion won).
Sales in the third quarter reached 86 trillion won, up 8.72% year-on-year and 15.33% quarter-on-quarter, setting a new historical record. Samsung will release its full financial report, including net profit and departmental breakdown items, later this month. SK Hynix's operating profit in Q3 exceeded the 10 trillion won mark for the first time, reaching 11.38 trillion won, a year-on-year surge of 62%. Revenue was 24.45 trillion won, up 39% year-on-year.
The net profit was 12.598 trillion won, and all three core indicators set new historical records. HBM business has become the core engine driving performance growth. The financial report disclosed that high-end products such as the 12-layer stacked HBM3E and server DDR5 contributed the main revenue increment, driving the company's gross margin up to 57%. It is learned that Samsung and SK Hynix have recently informed their customers that the contract or spot prices for the fourth quarter of 2025 will be raised by approximately 30%, involving DRAM and NAND Flash products. With the superimposition of cloud server, AI model training and inference demands, the supply and demand pattern of DRAM and NAND is changing. Several international electronics and server manufacturers are said to have been actively negotiating "2-3 year" medium - and long-term supply agreements with Samsung and SK Hynix in recent days to secure future resources and avoid the risk of price fluctuations.
Part of the reason for the increase in DRAM prices is that production capacity is being squeezed by HBM. It is reported that, citing Sumit Sadhana, Micron's chief commercial officer, the wafer capacity consumed by HBM is more than three times that of standard DRAM. Due to the high profits, memory manufacturers have sufficient motivation to prioritize the production of HBM.
SK Hynix has topped the DRAM market for three consecutive quarters
In the past two quarters: in Q1 2025, SK Hynix broke Samsung Electronics' long-term monopoly since 1992 for the first time, topping the global DRAM market with a 36.9% market share and ending Samsung's 33-year dominance. This milestone breakthrough marks that the DRAM market landscape has officially entered a brand-new stage of duopoly.
In Q1, Samsung's market share dropped to 34.4%, while SK Hynix surpassed it for the first time by a margin of 2.5 percentage points.
In Q2, the competitive gap further widened. SK Hynix's market share soared to 39.5%, while Samsung's continued to drop to 33.3%, with the gap between the two expanding to 6.2 percentage points. With the release of SK Hynix's Q3 financial report, the competition for the DRAM throne in the new quarter has now been answered. According to Counterpoint Research's "Memory Market Tracker Report", in Q3 2025, SK Hynix's DRAM revenue increased by 11% quarter-on-quarter and 54% year-on-year.
With a revenue share of 35%, it has remained the top player in the global DRAM market for the third consecutive quarter. Driven by the strong performance of HBM and general-purpose DRAM, the company's DRAM revenue for this quarter also reached a record high. Samsung Electronics ranked second with a 34% market share. Its revenue increased by 29% quarter-on-quarter and 24% year-on-year. The gap between it and SK Hynix has narrowed by 5 percentage points compared to last year.

Although SK Hynix was overtaken by Samsung Electronics in the overall memory market this quarter, the company continued to lead the DRAM market, supported by strong demand for HBM and general-purpose DRAM. In the HBM market, SK Hynix continues to dominate with a 58% market share. HBM accounted for as high as 40% of its total DRAM sales in the third quarter.
In addition, the company also expects to smoothly advance the delivery of HBM4 products in accordance with customer demands. In the general-purpose DRAM sector, the recovery in demand and the increase in prices have also provided strong support for the company's performance. Jeongku Choi, an analyst at Counterpoint Research, said, "With AI storage demand remaining high, SK Hynix is expected to continue its previous strong performance in Q4." The company actively responds to customer demands in the research and development of HBM4 and still leads the industry in terms of yield performance.
SK Hynix has completed supply negotiations for HBM4 with its core customers and plans to start mass production and shipment in the fourth quarter. Samsung plans to showcase its sixth-generation 12-layer HBM4 product at the "Samsung Tech Fair 2025" technology exhibition from October 27th to 31st, and intends to enter the mass production stage later this year. Analysts predict that the price of the 12-layer HBM4 product will be $500 per piece, which is over 60% higher than the current price of about $300 for the 12-layer HBM3e. SK Hynix's financial report also indicates that it has completed all negotiations with major customers regarding the supply of HBM in 2026 and plans to start shipping the next-generation HBM4 products in the fourth quarter of 2025 and conduct full-scale sales in 2026.
More importantly, SK Hynix has identified the customer demand for all DRAM and NAND production capacity in 2026. It is expected that the DRAM shipment volume in 2026 will increase by more than 20% year-on-year, and it is predicted that the tight supply of HBM will continue until 2027. But the competitive landscape is undergoing subtle changes. Micron has supplied some HBM products to NVIDIA, while Samsung Electronics passed NVIDIA's qualification test for advanced HBM products last month. MS Hwang, Research director of Counterpoint Research, warned: "For SK Hynix to remain profitable, maintaining and enhancing its competitive edge will be crucial." In the subsequent technological competition in the DRAM market, all these storage giants have spared no effort.
The storage faucet has been upgraded to High NA EUV
High NA EUV is a key technology, which opens the next chapter of the semiconductor industry. This is not a compliment to the High NA EUV lithography machine, but the current situation of chip manufacturing. The same is true for the storage industry. The High NA EUV lithography machine is a key technology for the next-generation chip manufacturing. Compared with traditional EUV, it can provide 1.7 times finer circuit patterns and 2.9 times higher transistor density, with an optical accuracy improvement of 40%.
This is crucial for the production of 2nm foundry chips with higher density, greater energy efficiency and more powerful performance, as well as advanced storage products such as vertical channel transistor DRAM and sixth-generation HBM4. This month, market sources said that Samsung Electronics is accelerating its bet on the DRAM field, purchasing five brand-new High-NA EUV lithography machines from ASML.
Two of them will be deployed in Samsung's semiconductor foundry division, while the rest of the equipment will be exclusively for the memory division. Previously, Samsung had introduced a High-NA EUV device for research and development at its Gyeonggi Province park. The machine introduced this time will be used for "mass production of products", which is the first time for Samsung.
Last month, SK Hynix also just announced that it has introduced the industry's first mass-produced High NA EUV to the M16 factory in Icheon, South Korea. However, the currently introduced High NA EUV is mostly used for research and development and trial production. It is not the case that the current generation of products will be produced using High NA EUV.
To explore when these two leading storage companies will adopt High NA EUV, we need to start with the current market competition hotspot, 1c DRAM. In August 2024, SK Hynix announced the successful development of the world's first sixth-generation 10nM-class 1c process DDR5 DRAM, an extension of the 1b platform, with higher production efficiency and significant improvements in operating speed and performance. In addition to DDR5, SK Hynix's LPDDR6, GDDR7 and other products will also adopt this process. 10nM-class DRAM has begun to introduce EUV lithography technology, but it is usually only applied in a few critical layers, while the vast majority still use DUV lithography. In August this year, SK Hynix upgraded its 1c process DRAM manufacturing to 6-layer EUV lithography for the first time.
This will help enhance the performance and yield of its products, enabling SK Hynix to introduce DDR5 memory with densier storage bits, faster read and write speeds, and lower power consumption, as well as higher-capacity HBM stacks. Market sources say that SK Hynix's 1c DRAM has achieved a yield rate of 80% to 90%, and it is expected to use more EUV lithography in next-generation products such as 1d and 0a DRAM, ultimately laying the foundation for the use of more advanced High NA EUV. Samsung Electronics has encountered challenges in the development of the sixth-generation 10nm 1c DRAM process, resulting in a continuous delay in the expected completion time. It is reported that the yield rate of Samsung's next-generation 1c DRAM on HBM4 is only about 50%. However, it is still unclear in which generation of products Samsung will use EUV lithography machines. For another leading memory company, Micron, High NA EUV has not yet been used.
In 2025, Micron launched a 16Gb DDR5 device using a brand-new 1γ (1-gamma) manufacturing process, which is the first time Micron has adopted EUV lithography technology. However, Micron adopts a method that combines EUV with multi-patterned DUV technology. It only uses EUV lithography for key metal layers, while the rest of the layers still employ deep ultraviolet (DUV) multi-exposure technology. However, Micron seems to have its own ideas for the subsequent evolution of DRAM. Micron, taking a different path? As competition with Samsung Electronics and SK Hynix intensifies, Micron Technology is accelerating the advancement of its DRAM process roadmap below 10 nanometers. It is learned that Micron is evaluating two potential roadmaps. One route follows a conventional sequence, evolving from the current seventh-generation (1d) 10nm process to the approximately 10.1nm eighth-generation (1e).
Another route is more ambitious. It completely skips the 1e step and directly transitions to the true 9nm DRAM process. In DRAM manufacturing, a narrower line width can lead to higher density and performance. The 10nm-class process has undergone several generations of evolution - 1x, 1y, 1z, 1a, 1b and 1c - and each generation has achieved more refined miniaturization. The latest commercial node 1c is approximately 11.2nm in size.
An industry insider pointed out that the key variable lies in how much Micron can reduce its 1d node size. If the 1d line width remains at around 10.9 nanometers, it may need to first introduce a 10.1-nanometer 1e process and then further reduce it. However, if 1d reaches approximately 10.2 nanometers, Micron may be able to skip the 1e process and directly enter the 9-nanometer level, which will be a significant technological leap. It is reported that Samsung plans to directly shift from its 1d node to the 9nm (0a) DRAM process, while SK Hynix is expected to adopt a similar rapid development strategy. As these two South Korean rivals accelerate the development of the 9nm process, Micron is adjusting its roadmap to remain competitive.
The two leading storage companies have also joined forces with OpenAI
Recently, Samsung Electronics and SK Hynix respectively signed agreements with OpenAI, announcing their participation as core partners in the global artificial intelligence infrastructure project Stargate. Stargate is OpenAI's $500 billion data center infrastructure project, which plans to build 20 AI-focused data centers for OpenAI's ChatGPT. The goal is to put it into operation before 2029. OpenAI is collaborating with SoftBank and Oracle on this project.
In addition, OpenAI is also collaborating with Samsung and SK Hynix to build two data centers in South Korea, with an initial capacity of 20 megawatts. In the coming period, Samsung and SK Hynix will increase the production of memory chips, with a target of 900,000 DRAM wafers per month. OpenAI did not specify whether this is standard DRAM or dedicated HBM. However, KED Global media claimed that this was for HBM. Because OpenAI's "Stargate" project aims to support the next-generation large model with hundreds of billions of parameters, it needs to handle tens of millions of data interactions per second. The traditional DDR5 memory's bandwidth of hundreds of GB/s has long been stretched thin.
The HBM (High Bandwidth Memory) that Samsung and SK Hynix are promoting precisely fills the gap - the HBM3E has a bandwidth of up to 3.35TB/s, which can increase the efficiency of GPU clusters by 30% and reduce latency by 20%. It is understood that Stargate's orders may also include server DRAM, graphics DRAM, and even SSDS. KED Global said that 900,000 wafers per month is twice the current global production capacity. It is understood that SK Hynix currently operates 160,000 DRAM and HBM wafers per month.
This means that both Samsung and SK Hynix must build new HBM factories. The chain reaction might be that they would reduce DRAM production because DRAM is not as profitable as HBM.